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The Step Recovery Diode (SRD) has long been used to build high order frequency multiplier circuits. An approximate design procedure for the SRD frequency multiplier can be found in Hewlett Packard application note 920.
While this 1960's era technology is still in fairly wide use, there's still no other computer program to aid in the design process and no nonlinear model of a true SRD known to the author. At least one manufacturer of step recovery diodes does publish approximate SPICE models of their parts, though SPICE cannot represent the diode's transition time.
The program SRD.EXE basically follows the design procedure outlined in HP App Note 920, adding a couple of fudge factors to compensate for the effects of the diode's package parasitics.
The circuit of figure 1 uses a transmission line resonator to couple the harmonic energy out of the diode.
The network LB / CB is a high pass filter. This is needed, because if the input circuit exhibits a resonance below the input frequency, the diode will oscillate. LB/CB are designed to have a high pass cuttoff frequency about 20% below the input frequency. That way, any low frequency resonance in the source which drives the multiplier will be effectively isolated from the diode.
Next, RB is the bias resistor. When RF is applied, the diode rectifies it, generating a bias voltage. This resistor allows a bias current to flow. The value of this resistor is critical, and needs to be determined experimentally. The program provides a starting value which is usually lower than the ideal value.
CM and LM form an impedance matching network.
CT and LI form the "impulse generator." When the RF input forward biases the diode, it conducts. When the RF input reverse biases the diode, it doesn't stop conducting until all of the charge carriers have time to flow out of the diode's inert region. Once the diode is finally depleted of charge carriers, it changes from a short circuit to an open circuit very abruptly. At this point, the collapsing magnetic field in inductor LI generates a voltage impulse with a very fast rise time, and short pulse width. This pulse is rich in harmonic content.
Finally, there is the output resonator. Whether the transmission line resonator of figure 1 is used, or the lumped element resonator of figure 2, this circuit rings at the frequency of the desired harmonic, and passes the harmonic on to the output.
That's all there is to the basic SRD multiplier circuit. This circuit is always followed by a multiple pole
band pass filter. (CLEAN-UP FILTER)
There are two reasons for this band pass filter.
The first is that the impulse generated by the SRD is rich in all harmonics, and the output resonator doesn't have very high rejection of the undesired harmonics, thus a X7 multiplier circuit would be putting out the sixth and eighth harmonics only 10 or 15 dB below the desired harmonic.
The second reason for the band pass filter is that by reflecting the undesired harmonics back into the diode, it raises the power efficiency of the multiplier. Part of the harmonic energy, after being reflected back into the diode, is re-converted to the desired frequency.
Start the program by typing SRD at the command prompt.
The first three prompts ask for the multiplier's input frequency, multiplication factor, and input impedance.
The next five prompts ask for the parameters of the diode itself. These are available from the data sheet.
The next prompt asks for the desired output impedance. This is usually 50 ohms.
After you enter this data, the program calculates the values of the inductors and capacitors shown in the schematic, as well as the impedance and electrical length of the transmission line resonator. The impedance of the transmission line resonator will be the same as the desired output impedance.
Finally, you're prompted for the name of a file to save the results. If you don't want to save, just hit CTL+C to quit.
Below is a sample run. The user responses are in red.
enter input frequency Fi(MHz)::350
enter frequency multiplication factor N::8
enter source impedance (ohms)::50
Enter SRD parameters
enter diode capacitence Cvr(pF)::3
enter transition time Tt(ps)::200
enter Minority Carrier Lifetime Tl(ns)::100
enter Parasitic Incuctance Lp(nH)::0.6
enter Parasitic Capacitence Cp(pF)::0.3
enter output impedance Zo, 20.4453 minumum, (Ohms)::50
1.25403e-09=li impulse gen inductor
1.11529e-10=ct impulse gen capacitor
6.4926e-09=lm matching inductor
3.18482e-11=cm matching capacitor
2.84205e-13=cc output coupling cap
0.21101=le output resonator electrical length
6.97143e-08=lb bias inductor
2.52857e-11=cb bias capacitor
331.573=rb bias resistor
enter name of file to save data.
Hit any key to quit
1. You usually need at least 100 mW of drive power for stable operation.
2. If the bias resistance is too high, the multiplier may oscillate. Too low, the output power will be low.
3. For optimum bias resistance over temperature, the bias resistor should be a "sensistor", which is a thermistor having a positive temperature coeficient of about +1% per °C.
4. If the multiplier needs to be stable over temperature, it's a good idea to sweep it's input signal over a narrow frequency range. As a rule of thumb, if it has to work over a temperature range of ±40°C, then at ambient temperature, you should be able to tune the input signal over ±1% of the center frequency.
5. Since the design procedure is only approximate, and all of the values are critical, all of the inductors and capacitors should be variable. Typically, this means air-wound inductors, which can be adjusted by bending the wire, and piston type variable capacitors.
6. The final clean-up filter should be tuned for flat response with resistive terminations, then left alone. While it may be possible to get more output from the multiplier if you tweak the clean-up filter, this usually results in unflat frequency response, and less stable operation over temperature. Leave the clean-up filter alone, and tune the output resonator which consists of TL and CC.
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